Design and characterization of a 30-GHz bandwidth low-power silicon traveling-wave modulator

We present the design and characterization of a silicon PN junction traveling-wave Mach-Zehnder modulator near 1550 nm wavelength. The device shows 30 GHz bandwidth at 1 V reverse bias, with a 2.7 V-cm VπLπ and accordingly a 9-V small-signal Vπ. The insertion loss of the phase shifter is 3.6 dB±0.4 dB. The device performance metrics in combination show significant improvement compared to the state-of-the-art in the sense that lower phase shifter loss and higher bandwidth are achieved for the same Vπ or vice versa. We demonstrated low modulation power of 640-fJ/bit at 40 Gb/s with a 1.6-Vpp differential-drive and 0-V DC bias, raising the prospect of direct compatibility with CMOS drive-voltages. Critical design tradeoffs are analyzed and design models are validated with measurement results. We proposed a new figure-of-merit (FOM) VπLπRpnC2pn as the junction design merit for high-speed traveling-wave modulators, and utilized 6 implants to achieve an optimal FOM with lower insertion loss. Several key RF design issues are addressed for the first time using simulation and measurement results. In particular, we discussed bandwidth extension using mismatched termination and closely matched experimental results. A bandwidth-limiting RF multi-mode behavior is noted, which also exists in other results in the literature; we suggested a widely applicable design remedy.