کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
1610577 | 1516279 | 2014 | 7 صفحه PDF | دانلود رایگان |
• Graphene interlayer led to increase in barrier height of Au/n-Ge Schottky contact.
• Decrease in the ideality factor and series resistance of Au/graphene/n-Ge Schottky contact.
• Fermi-level pinning at Au/Ge Schottky junction was released by the graphene interlayer.
• Reduction of interface state density caused by the passivation of Ge surface by graphene.
We fabricated the Au/n-type Ge Schottky barrier diodes (SBDs) by introducing a graphene interlayer in-between Au and n-type Ge. Then we investigated the effects of the graphene interlayer on their electrical properties using the current–voltage (I–V) and capacitance–voltage (C–V) characteristics. Schottky barrier properties of Au/n-type Ge SBDs with and without graphene interlayer were cross-checked by various analysis techniques such as forward I–V, C–V, Cheung’s, and Norde’s methods. The Au/n-type Ge SBD with graphene interlayer exhibited lower ideality factor and series resistance, as compared to Au/n-type Ge SBD. The barrier height of Au/graphene/n-type Ge SBD was higher than that of Au/n-type Ge SBD. It is observed that the Fermi-level pinning at Au/Ge Schottky junction was released by the graphene interlayer. The Fermi-level depinning behavior of Ge was also observed in the graphene-interlayered Ti contact to n-type Ge. The introduction of the graphene interlayer to Au/n-type Ge SBD led to a significant reduction of interface state density (Nss) associated with the passivation of Ge surface by graphene, which could be responsible for minimizing the Fermi-level pinning of Ge.
Journal: Journal of Alloys and Compounds - Volume 614, 25 November 2014, Pages 323–329