Electrical characterization of flash memory structure with vanadium silicide nano-particles

We fabricated vanadium silicide (V3Si) nano-particles embedded in silicon dioxide dielectric layer and characterized their charging effect to apply a non-volatile memory device. To create the V3Si nano-particles, the first post-annealing process in N2 gas ambient by rapid thermal annealing method was done at 800 °C for 5 s. V3Si nano-particles with an average size of approximately 4–6 nm were distributed between the tunnel and control oxide layers. The channel length and width of the transistor are 5 μm. This device maintained the memory window at about 1 V after 104 s, when applied program/erase voltages are ±9 V for 1 s. This result indicates that V3Si nano-particles have a high potential for non-volatile memory devices.

► A flash memory with V3Si nano-particles in SiO2 was fabricated.
► Thermal annealing method was done at 800 °C for 5 s to create V3Si nano-particles.
► The memory window was maintained at about 1 V after 104 s.
► V3Si nano-particles have a high potential for non-volatile memory devices.