Hot-electron induced impact-ionisation damage at the interface of sub-micron silicon MOS devices: Model and monitor

It is well known that hot-carriers can cause damage to the interface of silicon MOS devices. Sub-micron and nano-channel nMOS devices have a higher electron temperature in the channel leading to increased impact-ionisation and enhanced interface degradation and damage. During dynamic operation of the nMOS device, hot-electron and hot-hole injections may take place giving rise to greater interface damage. Hot electrons produced due to impact ionisation also generate secondary electron-hole pairs in Si substrate. The visible light is generated by radiative recombination between the secondary hot electrons and hot holes. An optimised substrate current model was developed, the model was used to plot substrate current for a sub-micron nMOS transistor and was compared with the actual measurements carried out on similar device. It was found that the substrate current model can be used as a reliable monitor for impact ionisation damage in MOS devices.