On the speed of response of an FPGA-based shutdown system in CANDU nuclear power plants

Several issues in an FPGA based implementation of shutdown systems in CANDU nuclear power plants have been investigated in this paper. A particular attention is on the response time of an FPGA implementation of safety shutdown systems in comparison with operating system based software solutions as in existing CANDU plants. The trip decision logic under “steam generator (SG) level low” condition has been examined in detail. The design and implementation of this logic on an FPGA platform have been carried out. The functionality tests are performed in a hardware-in-the-loop (HIL) environment by connecting the FPGA based system to an NPP simulator, and replacing one channel of Shutdown System Number 1 (SDS1) in the simulator by the FPGA implementation. The response time of the designed system is also measured through multiple tests under different conditions, and statistical data analysis has been performed. The results of the response time tests are compared against those of a software-based implementation of the same trip logic.

► Design and implementation of an FPGA-based CANDU SDS1.
► Hardware-in-the-loop simulation for performance evaluation involved with an NPP simulator.
► Comparison of the response time between FPGA-based trip channel and software-based PLC.