Low cost optimized Trojan secured schedule at behavioral level for single & Nested loop control data flow graphs (Invited Paper)

Internet of Things (IoT) powered by high level synthesis (HLS) provides huge opportunity of progress in the area of hardware design. However, the present era of hardware design involves globalization which poses security threat to the design integrators that rely on third party intellectual property (IP) cores for increasing design productivity at reduced design time. This paper presents for the first time in the literature, a low cost optimized hardware Trojan secured HLS approach for hardware (or application specific core) designs that is based on single or nested loop control data flow graphs (CDFG) applications. The paper presents multiple novel vendor allocation schemes (each with its own attribute of delay and area) as security constraint that yield Trojan secured schedules at behavioral level. Demonstration of the proposed approach on a nested loop case study asserts our proposed theory. Results on standard benchmarks indicate significant reduction in final solution cost compared to a similar approach.