Analytical model for thin-film SOI PIN-diode leakage current

An analytical model for the thin-film silicon-on-insulator pin-diode leakage current is presented. Particularly the back-gate potential influence on the leakage current is addressed. The two-dimensional Poisson equation is simplified and then solved including the influence of the back-gate potential. Subsequently the analytical model is verified by comparison with numerical simulation and measurements. For the verification of the model the dependence on the back-gate potential, reverse voltage, device geometry, doping concentration and -polarity is considered. In this procedure the interface recombination velocity is used as fitting parameter. The model verification shows an accurate modeling of the leakage current at full depletion in combination with a back-gate potential dependence. The usage of the model is limited to back-gate and reverse potentials close to full depletion state of the pin-diode.