کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
538583 | 871104 | 2011 | 10 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Low power finite state machine synthesis using power-gating
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
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چکیده انگلیسی
Power-gating turns off the power supply of a portion of the circuit completely, resulting in total elimination of power consumption for that part. However, it also necessitates that the sub-circuit to be activated should be charged for some time before its activation. This critical issue can influence the decomposition of a finite state machine (FSM) for its power gated implementation. In this paper we have presented a power-gating method that integrates FSM partitioning with state encoding, thus providing a total solution to the problem of power-aware FSM synthesis. It shows better results, in terms of dynamic and leakage power consumption, compared to the existing techniques reported in the literature.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Integration, the VLSI Journal - Volume 44, Issue 3, June 2011, Pages 175–184
Journal: Integration, the VLSI Journal - Volume 44, Issue 3, June 2011, Pages 175–184
نویسندگان
Sambhu Nath Pradhan, M. Tilak Kumar, Santanu Chattopadhyay,