کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
539440 | 1450231 | 2016 | 9 صفحه PDF | دانلود رایگان |
![عکس صفحه اول مقاله: Read operation performance of large selectorless cross-point array with self-rectifying memristive device Read operation performance of large selectorless cross-point array with self-rectifying memristive device](/preview/png/539440.png)
• Provide a Verilog-A behavioral model of a memristive device with intrinsic rectifying behavior based on published measured characteristics of these devices.
• Evaluate read operation performance under diverse settings.
• Demonstrate the effectiveness of this special type of memristive device as an alternative to reduce sneak-path currents in the crossbar.
• Performs a valuable crossbar read operation comparison among memristive device with intrinsic-rectifying behavior, memristive device with linear I–V characteristic and 1S1M structure.
Memristive device based passive crossbar arrays hold a great promise for high-density and non-volatile memories. A significant challenge of ultra-high density integration of these crossbars is unwanted sneak-path currents. The most common way of addressing this issue today is an integrated or external selecting device to block unwanted current paths. In this paper, we use a memristive device with intrinsic rectifying behavior to suppress sneak-path currents in the crossbar. We systematically evaluate the read operation performance of large-scale crossbar arrays with regard to read margin and power consumption for different crossbar sizes, nanowire interconnect resistances, ON and OFF resistances, rectification ratios under different read-schemes. Outcomes of this study allow improved understanding of the trade-off between read margin, power consumption and read-schemes. Most importantly, this study provides a guideline for circuit designers to improve the performance of oxide-based resistive memory (RRAM) based cross-point arrays. Overall, self-rectifying behavior of the memristive device efficiently improves the read operation performance of large-scale selectorless cross-point arrays.
Journal: Integration, the VLSI Journal - Volume 54, June 2016, Pages 56–64