کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
540189 871293 2009 10 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Performance-driven scheduling of behavioural specifications
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
Performance-driven scheduling of behavioural specifications
چکیده انگلیسی

Conventional scheduling algorithms usually adjust the clock cycle duration to the execution time of the longest operations. This results in large slack times wasted in those cycles with faster operations. To reduce the wasted times multi-cycle and chaining techniques have been employed. Chaining contributes to reduce the circuit latency if it is applied to the critical path operations, and multi-cycle operators usually result in smaller clock cycles. Both techniques are applied at the operation level, and thus their impact on the circuit performance is bounded by the selected latency. Additionally, they have limited reusability. The design methodology presented in this paper overcomes the limitations of previous techniques to obtain substantially faster circuits. It fragments some of the specification operations into several smaller ones that are handled independently. This way, some operations can begin before their predecessors have finished and can also be executed in several unconsecutive cycles. Furthermore, the fragmentation of operations favours the reusability of hardware resources, leading also to smaller designs.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Integration, the VLSI Journal - Volume 42, Issue 3, June 2009, Pages 294–303
نویسندگان
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