A scalable voltage controlled oscillator for multi-rate high-speed interfaces

This paper proposes a voltage controlled oscillator (VCO) which is based on a pseudo-differential ring oscillator suitable for multi-Gbps serial interfaces. The delay element employed in the ring oscillator topology consists of two CMOS inverters loaded by a simple negative resistance realized with pMOS transistors. The proposed topology is designed and simulated in a 65 nm CMOS process with 1.2 V supply voltage. As a realistic application, the VCO performance is optimized to be compliant with the MIPI Alliance M-PHY standard which is the most updated high-speed serial interface technology. The frequency tuning range covers the three frequency bands of the MPHY standard which are [0.624 and 0.7288] GHz, [1.248 and 1.4576] GHz and [2.496 and 2.9152] GHz and corresponds to high-speed gear 1,2 and 3, respectively. In each gear an almost constant KVCO is achieved while the current consumption of the whole system is 2.87, 5.19 and 10.06 mA for the gears 1,2 and 3, respectively. The phase noise is about −94 dBc/Hz at 1 MHz frequency offset for 2.9152 GHz.