Design and implementation of Multistage Interconnection Networks using Quantum-dot Cellular Automata

Quantum-dot Cellular Automata (QCA) is a promising nanotechnology with ultra-small feature size and ultra-low power consumption compared with transistor-based technologies. During the past decade the QCA has been carefully studied, and it has demonstrated the ability of using quantum phenomena for implementing logical devices. Multistage Interconnection Networks (MINs) have been frequently suggested as the connection means in parallel systems. This architecture provides the maximum bandwidth to the components, and the minimum latency access to memory modules. They are generally accepted concepts in the semiconductor industry for solving problems related to on-chip communications. Although there have been a large amount of researches on MINs for parallel processing, there seems to be surprising attempts to utilize the unique characteristics of QCA for designing and implementing of MINs. In an effort to fill this gap, this paper presents the first design methodology of MINs using QCA. To demonstrate the functionality and validity of the proposed methodology, performance evaluations of MINs using QCADesigner simulator are given and analyzed.