A novel Alienor-based heuristic for the optimal design of analog circuits

A heuristic for solving (non-linear and constrained) analog optimization problems is proposed. The method is based on an approximation of multi-variable multi-objective problems by a mono-objective problem of one variable: the Alienor technique and a normalization technique are used for this purpose. Application to the optimal design of an inverted CMOS current conveyor and a class AB grounded gate switched current memory cell are given.