Code modernization strategies to 3-D Stencil-based applications on Intel Xeon Phi: KNC and KNL

Emerging massively data-parallel architectures, such as Intel Xeon Phi, offer a great opportunity to address challenging problems based on PDEs. However, the code migration to these architectures is not straight-forward. To achieve this code modernization programming cycle, it is mandatory to identify the key issues in the code that will determine performance in future hardware evolutions. In this paper we look for (1) scalability with core count, (2) data-parallelism exposure to explore vectorization capabilities, and (3) data-locality aware techniques. These techniques lead a performance gain of up to 15x for the first generation of Xeon Phi: Knights Corner (KNC), and an additional average 2.5x improvement for Knights Landing (KNL).