کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
6942117 | 1450224 | 2018 | 10 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Edge effects on the TSV array capacitances and their performance influence
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
![عکس صفحه اول مقاله: Edge effects on the TSV array capacitances and their performance influence Edge effects on the TSV array capacitances and their performance influence](/preview/png/6942117.png)
چکیده انگلیسی
The TSV capacitances are essential to estimate the pattern dependent performance of 3-D interconnects. A full-chip capacitance extraction with a field solver is very cost intensive and therefore not suitable for a fast design exploration. An accurate and scalable high-level TSV capacitance model is required. However, the previously used model does not include the edge effects, which can influence the capacitance values by magnitudes. In a quadratic 36Â bit array, 20 TSVs are located at the edges. Therefore, the capacitance model needs to be extended by the edge effects, which is the main contribution of this work. The experimental results of this paper show that for 48 different modern TSV structures, the presented model reduces the root-mean-square-error (RMSE) by over 95%, compared to the previously used model. For the estimation of the pattern dependent TSV array energy consumption, the experimental results reveal a normalized RMSE of 4.50% for the presented model, while the previously used model shows a RMSE of 41.62%. Additionally, a case study is presented which proves that existing TSV coding approaches, derived by means of the previous model, are impractical due to the edge effects.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Integration - Volume 61, March 2018, Pages 1-10
Journal: Integration - Volume 61, March 2018, Pages 1-10
نویسندگان
Lennart Bamberg, Amir Najafi, Alberto GarcÃa-Ortiz,