کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
6942239 | 1450225 | 2018 | 9 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
A new low-power dynamic circuit for wide fan-in gates
ترجمه فارسی عنوان
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کلمات کلیدی
مدار دینامیکی فن در گیتس، ایمنی سر و صدا، ثبت نام فایل
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
چکیده انگلیسی
In this paper, a new dynamic circuit is proposed to reduce the power consumption of wide fan-in gates. Since the voltage difference across the pull-down network determines the output in the proposed circuit, the voltage swing on the pull-down network can be lowered to decrease the dramatically increasing power consumption of wide fan-in gates. Wide fan-in OR gates are designed and simulated using the proposed domino circuit in 90 nm CMOS technology. Simulation results exhibit up to 2.62X improvement in noise immunity and 44% reduction in power consumption compared to the conventional domino circuits at the same delay. Moreover, a 2-read, 1-write ported 64-word à 32-bit/word register file is designed using the proposed domino circuit. The Register file is simulated using low-Vth 90 nm CMOS model in all process corners. The results shows 25% power reduction and 32% speed improvement for the proposed register file in comparison with the conventional register file at the same noise margin floor.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Integration, the VLSI Journal - Volume 60, January 2018, Pages 263-271
Journal: Integration, the VLSI Journal - Volume 60, January 2018, Pages 263-271
نویسندگان
Mohammad Asyaei,