کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
6942270 | 1450230 | 2016 | 8 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Comparison of QMC-based yield-aware pareto front techniques for multi-objective robust analog synthesis
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
مهندسی کامپیوتر
سخت افزارها و معماری
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چکیده انگلیسی
This paper focuses on the implementation of different techniques for the integration of yield estimation in the synthesis loop of analog integrated circuits (ICs). MOEA/D (Multi-Objective Evolutionary Algorithm with Decomposition) is considered to be a very powerful multi-objective optimization algorithm. For the consideration of yield, several techniques are discussed and three different yield-aware Pareto front (PF) generation techniques have been implemented on the MOEA/D optimizer. The implemented yield-aware PF techniques are compared by designing a fully-differential folded-cascode amplifier with different number of objectives. In order to embed the variation effects into the optimization loop, the statistical analysis of the circuit has been carried out by using a Quasi Monte Carlo (QMC) technique. The results suggest that especially two of these techniques look promising for high dimensional robust optimization of analog circuits.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Integration, the VLSI Journal - Volume 55, September 2016, Pages 357-365
Journal: Integration, the VLSI Journal - Volume 55, September 2016, Pages 357-365
نویسندگان
Murat Pak, Francisco V. Fernandez, Gunhan Dundar,