کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
7150747 | 1462195 | 2017 | 22 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Use DAS algorithm to break through the device limitations of switched-capacitor-based DAC in an ADC consisting of pipelined SAR and TDC
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
سایر رشته های مهندسی
مهندسی برق و الکترونیک
پیش نمایش صفحه اول مقاله
چکیده انگلیسی
Switched capacitors are widely used in integrated circuits for discrete-time signal processing. Metal-Insulator-Metal (MIM) capacitors and MOSFET switches are commonly used for switched-capacitor circuits. They impose limitations in the power consumption and the bandwidth of the circuits. For instance, the switched-capacitor digital-to-analog converter (DAC) is the critical circuit block that determines the performance in a successive approximation register (SAR) analog-to-digital converters (ADC). In this paper, a design using the detect-and-skip (DAS) algorithm to break through the device limitations of switched-capacitor-based DACs is analyzed in a coarse-fine SAR ADC architecture. When it is shown that compared with the state-of-the-art Vcm-based capacitive DAC (CDAC), the DAS algorithm reduces 55% of the energy and extends the valid bandwidth from 2â¯MHz to 16â¯MHz with a 6-bit resolution under the same setting and technology. Besides, a time-to-digital converter (TDC)-assisted pipelined SAR ADC architecture using the DAS algorithm is proposed. Implemented in a 180â¯nm CMOS process, the 10-bit 10-MS/s prototype measures an energy efficiency of 57.8 fJ/conv.-step.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Solid-State Electronics - Volume 138, December 2017, Pages 119-125
Journal: Solid-State Electronics - Volume 138, December 2017, Pages 119-125
نویسندگان
Zhongyi Fu, Xian Tang, Kong-Pang Pun,