OPAIC: An optimization technique to improve energy consumption and performance in application specific network on chips

• We present a new optimization method to decline energy consumption and area of NoCs.
• It composed of a linearized QAP, a MILP model and a Greedy Algorithm to optimize NoC.
• The energy and area consumption are 78.5% and 34.5% less than the previous studies.
• The method reduces the number of routers by 66% comparing to the previous approaches.

Network on Chip (NoC) is an appropriate and scalable solution for today’s System on Chips (SoCs) with the high communication demands. Application specific NoCs is preferable since they can be customized to optimize all requirements of the specific applications. This paper presents an OPtimization technique for Application specifIC NoCs (OPAIC), which aims not only to decrease the energy consumption but also to improve the area of NoCs. OPAIC is composed of three stages to find the optimum NoC; in the first stage, it uses a linearized form of a Quadratic Assignment Problem (QAP) to map tasks on cores to minimize the energy. In the second stage, a Mixed Integer Linear Problem (MILP) is proposed to find the optimum number of the routers for the layout earned in previous stage. Finally, a Greedy Algorithm is applied to optimize the number of virtual channel for every link based on its traffic needs.