کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
747462 | 894524 | 2009 | 6 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Silicon on thin BOX (SOTB) CMOS for ultralow standby power with forward-biasing performance booster
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
سایر رشته های مهندسی
مهندسی برق و الکترونیک
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چکیده انگلیسی
Ultra-low off current (Ioff < 1 pA/μm) “silicon on thin buried oxide (SOTB)” CMOSFETs were developed using 65-nm technology. The off current of SOTB CMOSFETs was studied and gate-induced drain leakage (GIDL) was adequately reduced by controlling the gate-overlap length. A back-gate bias in a SOTB scheme was demonstrated, and the inverter delay was compared with conventional low-standby-power bulk CMOSFETs. We show small variation in SOTB devices and estimate the standby leakage of a 1-M bit SRAM. The half threshold voltage standard deviation (σVth) of SOTB devices corresponds to a reduction in the standby leakage current of less than half. The ultra-low off current with a small variation also further reduces the standby leakage.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Solid-State Electronics - Volume 53, Issue 7, July 2009, Pages 717–722
Journal: Solid-State Electronics - Volume 53, Issue 7, July 2009, Pages 717–722
نویسندگان
T. Ishigaki, R. Tsuchiya, Y. Morita, H. Yoshimoto, N. Sugii, T. Iwamatsu, H. Oda, Y. Inoue, T. Ohtou, T. Hiramoto, S. Kimura,