Gradual bipolar resistive switching in Ni/Si3N4/n+-Si resistive-switching memory device for high-density integration and low-power applications

• We fabricated Ni/Si3N4/n+-Si RRAM devices with CMOS compatibility.
• Multi-level cell (MLC) is demonstrated by modulating resistance value.
• LRS and HRS conductions are explained by SCLC mechanism.

In this work, we report a gradual bipolar resistive switching memory device using Ni/Si3N4/n+-Si structure. Different reset transitions are observed depending on compliance current (ICOMP). The reset switching becomes abrupt around ICOMP = 10 mA, while gradual reset switching with fine controllability is preserved for the devices with ICOMP < 1 mA. We demonstrate multi-level cell (MLC) operation through the modulation of conducting path by controlling ICOMP and reset stop voltage (VSTOP) for ICOMP < 1 mA. For the devices with ICOMP = 10 mA, low resistance state (LRS) shows Ohmic behavior with metallic conducting paths, while high resistance state (HRS) shows non-Ohmic behavior. Also, it is revealed that LRS and HRS conductions follow space-charge-limited current (SCLC) mechanism in low ICOMP regime (ICOMP < 1 mA).