Designing digital circuits with nano-scale devices: Challenges and opportunities

This paper presents an overview of the challenges and opportunities when designing digital integrated circuits in nano-scale technologies. Major applications requirements and nano-technologies design limitations are introduced. Design solutions currently under development like adaptive techniques aiming to cope with variations and to track an optimal energy operating point are presented.

► We present the main requirements of future applications for nano-scale circuits.
► We present the key challenges designers have to address in nano-scale technologies.
► Ultra-wide operating range is discussed for digital blocks and SRAM memories.
► Solutions for mastering stand-by leakage are detailed for blocks and memories.
► Examples demonstrate the interest of Ultra-Thin-Body and Box technologies.