IGBT scaling principle toward CMOS compatible wafer processes

A scaling principle for trench gate IGBT is proposed. CMOS technology on large diameter wafer enables to produce various digital circuits with higher performance and lower cost. The transistor cell structure becomes laterally smaller and smaller and vertically shallower and shallower. In contrast, latest IGBTs have rather deeper trench structure to obtain lower on-state voltage drop and turn-off loss. In the aspect of the process uniformity and wafer warpage, manufacturing such structure in the CMOS factory is difficult. In this paper, we show the scaling principle toward shallower structure and better performance. The principle is theoretically explained by our previously proposed “Structure Oriented” analytical model. The principle represents a possibility of technology direction and roadmap for future IGBT for improving the device performance consistent with lower cost and high volume productivity with CMOS compatible large diameter wafer technologies.

► We establish IGBT scaling principle toward CMOS compatible wafer process.
► The principle enables to obtain lower cost and better performance.
► We confirmed the principle by TCAD simulation.
► We theoretically explained the principle by our previously proposed analytical model.
► The principle represents a roadmap for future IGBT.