A novel three-dimensional dual control-gate with surrounding floating-gate (DC-SF) NAND flash cell

A novel three-dimensional (3D) Dual Control gate with Surrounding Floating gate (DC-SF) NAND flash cell has been successfully developed. The DC-SF cell consists of a surrounding floating gate with stacked dual control gates. With this structure, high coupling ratio, low voltage cell operation, and wide P/E window (9.2 V) can be obtained. Moreover, negligible FG–FG coupling interference (12 mV/V) is achieved due to the control-gate shield effect. As a result, DC-SF NAND flash cell can overcome the problems of SONOS-based 3D NAND flash. It is proposed that 3D DC-SF NAND flash cell is the most promising candidate for 1 Tb and beyond, with stacked multi bit FG cell (2–4 bits/cell).

► A novel three-dimensional (3D) Dual Control gate with Surrounding Floating gate (DC-SF) NAND flash cell has been successfully developed.
► The DC-SF cell consists of a surrounding floating gate with stacked dual control gates.
► High coupling ratio, low voltage cell operation, and wide P/E window (9.2 V) can be obtained.
► A negligible FG–FG coupling interference (12 mV/V) is achieved due to the control-gate shield effect.