An equivalent doping profile for CMOS substrate characterization

This work presents a non-destructive methodology to accurately estimate an equivalent substrate doping profile of a typical CMOS process. The methodology is based on simple experimental resistive measurements at different temperatures, obtained from a set of basic integrated test structures, and in 3D semiconductor simulations, to compute an estimate for the unknown CMOS process parameters. It is demonstrated that the resultant box distribution equivalent doping profile could be used to evaluate the variation of the substrate impedance as a function of temperature and substrate contact distance.

► Work shows a method to obtain equivalent doping profiles of CMOS substrates.
► Based on resistive measurements at different temperatures and 3D simulations.
► Enables foundries to provide box distribution profiles for CMOS circuit design.
► Enables the development of analytical impedance model, suitable to EDA tools.