کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
748567 | 1462254 | 2012 | 6 صفحه PDF | دانلود رایگان |

The highly reactive GaSb surface was passivated with a thin InAs layer to limit interface trap state density (Dit) at the III–V/high-k oxide interface. This InAs surface was subjected to various cleaning processes to effectively reduce native oxides before atomic layer deposition (ALD). Ammonium sulfide pre-cleaning and trimethylaluminum/water ALD were used in conjunction to provide a clean interface and annealing in forming gas (FG) at 350 °C resulted in an optimized fabrication for n-GaSb/InAs/high-k gate stacks. Interface trap density, Dit ≈ 2–3 × 1012 cm−2eV−1 resided near the n-GaSb conductance band which was extracted and compared with three different methods. Conductance–voltage–frequency plots showed efficient Fermi level movement and a sub-threshold slope of 200 mV/dec. A composite high-k oxide process was also developed using ALD of Al2O3 and HfO2 resulting in a Dit ≈ 6–7 × 1012 cm−2eV−1. Subjecting these samples to a higher (450 °C) processing temperature results in increased oxidation and a thermally unstable interface. p-GaSb displayed very fast minority carrier generation/recombination likely due to a high density of bulk traps in GaSb.
► InAs passivation of the GaSb surface improved MOSCAP gate control.
► Sulfur pretreatment and TMA exposure reduced trap state density.
► High temperature annealing to 450 °C led to a thermally unstable interface.
Journal: Solid-State Electronics - Volume 78, December 2012, Pages 56–61