Modelling of the hole mobility in p-channel MOS transistors fabricated on (1 1 0) oriented silicon wafers

The paper deals with the investigation of the hole mobility in p-channel MOS transistors fabricated on (1 1 0) oriented silicon wafers. At first, we showed that the conventional methods used to extract the conduction parameters such as the low field mobility or the mobility attenuation factor could not be applied for this orientation. This is the consequence of a change in the origin of the scattering mechanisms limiting the effective mobility. While in the case of the (1 0 0) p-MOS transistors the phonon scattering is the unique mechanism defining the effective mobility, this one is characterized by an arrangement of the Coulomb scattering, phonon scattering as well as surface roughness scattering in the case of the (1 1 0) p-MOS transistors. A consequence is that the modelling of the mobility must include all three mechanisms in order to simulate accurately the static characteristics of Si(1 1 0) p-MOS transistors, making then a necessity for us to develop a more adapted model. Finally, it has been seen that the effective mobility in the p-MOS transistors on Si(1 1 0) is not only higher than the one in the p-MOS transistors on Si(1 0 0) but appears to be almost electric independent over the usual range of polarisations making it more stable and then pleading even more in this new orientation’s favour.