LaLuO3 higher-κ dielectric integration in SOI MOSFETs with a gate-first process

The chemical reactions at the higher-κ LaLuO3/Ti1NX/poly-Si gate stack interfaces are in detail investigated. Electrical and structural characterization methods are employed to explore the thermal stability of the gate stack. A Ti-rich TiN metal layer degrades the gate stack performance after high temperature annealing while the gate stack with a near stoichiometric TiN layer is stable during 1000 °C, 5 s anneals. Based on these results an integration process of TiN/LaLuO3 in a gate-first MOSFET process on SOI is shown.

► MOSFETs with LaLuO3 ternary rare earth oxide.
► High temperature CMOS compatible processing up to 1000 °C/5 s.
► EELS and HAXPES interface and composition analysis.
► Interface analysis using synchrotron radiation.