Minimum lateral extension of planar junction terminations

In order to enhance yield in power devices, the loss of chip area due to electrically nonusable regions is subject of continual minimization. For this purpose, the theoretical limit for the minimum lateral extension of planar junction terminations for p+n-junctions with a desired breakdown voltage is derived. In a first step, the dependence of the extension on doping concentration NB of the low-doped n-region is illustrated. A drastic reduction of the extension of the termination structure can be achieved by lowering NB down to 20% or less in comparison to its maximum value suited for the desired breakdown voltage. As a consequence, the presented approach is applicable for bipolar devices only. To achieve exact values for the minimum extension occurring for the case of intrinsic silicon, the breakdown field strength of intrinsic silicon for different widths of the space charge region was calculated by solving the ionization integrals. Numerical results are presented supporting the validity of the calculated values for the minimum extension that for instance amounts to lmin=82 μm for a breakdown voltage (BV) 1200 V and to lmin=363 μm for BV=4500 V, respectively.