Automatic parameter extraction technique for gate leakage current modeling in double gate MOSFET

• We developed automatic parameter extraction techniques to extract model parameters.
• DT and TAT gate leakage current parameters have been extracted for Trigate MOSFET.
• The correlations between gate leakage current model parameters are studied.
• The industry standard package IC-CAP is used to consider extraction techniques.
• The results show good agreement with the measured data in Trigate MOSFET.

Direct Tunneling (DT) and Trap Assisted Tunneling (TAT) gate leakage current parameters have been extracted and verified considering automatic parameter extraction approach. The industry standard package IC-CAP is used to extract our leakage current model parameters. The model is coded in Verilog-A and the comparison between the model and measured data allows to obtain the model parameter values and parameters correlations/relations. The model and parameter extraction techniques have been used to study the impact of parameters in the gate leakage current based on the extracted parameter values. It is shown that the gate leakage current depends on the interfacial barrier height more strongly than the barrier height of the dielectric layer. There is almost the same scenario with respect to the carrier effective masses into the interfacial layer and the dielectric layer. The comparison between the simulated results and available measured gate leakage current transistor characteristics of Trigate MOSFETs shows good agreement.

Figure optionsDownload as PowerPoint slide