Monte Carlo analysis of the dynamic behavior of III–V MOSFETs for low-noise RF applications

• A device Monte Carlo simulator is used in transient regime.
• Bulk and XOI III–V MOSFET architectures are benchmark with standard Si Bulk MOSFET.
• Both static and dynamic regimes are studied under low supply voltage (VDD).
• Noise behavior is carefully investigated.

III–V Metal–Oxide-Semiconductor Field-Effect Transistors (MOSFETs) with a high-κ dielectric gate stack are investigated as a possible route to enhance the performance of either microwave or logic circuits with low supply voltage (VDD). The intrinsic performance of III–V MOSFETs in both static and dynamic regimes under low VDD is estimated using device Monte Carlo simulation. The characteristics of a Bulk-like and XOI-like III–V MOSFETs are quantitatively assessed and compared in terms of DC transconductance, high frequency performance and noise behavior. Finally, the comparison with Si-based devices shows the potential of III–V nano-MOSFET architectures for high-frequency and low noise application under low operating power.