کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
752800 1462245 2013 5 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
Explicit calculation for grain boundary barrier height in polysilicon TFTs based on quasi-two-dimensional approach
موضوعات مرتبط
مهندسی و علوم پایه سایر رشته های مهندسی مهندسی برق و الکترونیک
پیش نمایش صفحه اول مقاله
Explicit calculation for grain boundary barrier height in polysilicon TFTs based on quasi-two-dimensional approach
چکیده انگلیسی


• An explicit scheme to efficiently compute the GB barrier height.
• The solution is preferable for circuit simulators.
• The discrete GB model is based on the quasi-2D approach.

A physical-based explicit calculation to the height of grain boundary barrier has been derived based on the quasi-two-dimensional approach at discrete grain boundaries. The analytical solution is obtained by using the Lambert W function, combining both the uniform distributed deep states and the exponential tail states. The proposed scheme is demonstrated as an accurate and computationally efficient solution in a closed form, which can serve as a basis for the discrete-grain-based models of mobility and drain current in polysilicon thin film transistors. It is verified successfully by comparisons with both numerical simulation and experimental data.

ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Solid-State Electronics - Volume 87, September 2013, Pages 69–73
نویسندگان
, ,