A computationally efficient compact model for fully-depleted SOI MOSFETs with independently-controlled front- and back-gates

In this paper a computationally efficient surface-potential-based compact model for fully-depleted SOI MOSFETs with independently-controlled front- and back-gates is presented. A fully-depleted SOI MOSFET with a back-gate is essentially an independent double-gate device. To the best of our knowledge, existing surface-potential-based models for independent double-gate devices require numerical iteration to compute the surface potentials. This increases the model computational time and may cause convergence difficulties. In this work, a new approximation scheme is developed to compute the surface potentials and charge densities using explicit analytical equations. The approximation is shown to be computationally efficient and preserves important properties of fully-depleted SOI MOSFETs such as volume inversion. Drain current and charge expressions are derived without using the charge sheet approximation and agree well with TCAD simulations. Non-ideal effects are added to describe the I–V and C–V of a real device. Source-drain symmetry is preserved for both the current and the charge models. The full model is implemented in Verilog-A and its convergence is demonstrated through transient simulation of a coupled ring oscillator circuit with 2020 transistors.

Research highlights
► A computationally efficient approximation for surface potential in FDSOI MOSFETs is developed.
► I–V and C–V models for FDSOI MOSFETs are derived without making the charge sheet approximation.
► The core model and non-ideal effect expressions are implemented in Verilog-A language.
► The model is symmetric with respect to Vds = 0 and continuous in all regions of operation.