MEMS on cavity-SOI wafers

Silicon-on-insulator wafers with pre-etched cavities provide freedom to MEMS design. We have studied direct bonding and mechanical thinning of pre-etched silicon wafers. We have found out that during the thinning process the flexibility of the diaphragm causes a variation in their thickness. The integrity, thickness variation and shape of thinned diaphragms are dictated by cavity dimensions, SOI thickness, cavity vacuum and thinning process. These variables have been in this study put together to form design rules for cavity-SOI manufacturing. The pre-etched cavities enable the release etching of SOI devices using dry etching. We have demonstrated fabrication and functionality of two different types of MEMS-devices.