Trapping in deep defects under substrate hot electron stress in TiN/Hf-silicate based gate stacks

Substrate hot electron stress was applied on n+-ringed n-channel MOS capacitors with TiN/Hf-silicate based gate stacks to study the role of O vacancy induced deep bulk defects in trapping and transport. For the incident carrier energies above the calculated O vacancy formation threshold, applied on MOS devices with the thick high-κ layer, both the flatband voltage shift due to electron trapping at the deep levels and the increase in leakage current during stress follow tn (n ≈ 0.4) power law dependence. Negative-U transitions to the deep levels are shown to be possibly responsible for the strong correlation observed between the slow transient trapping and the trap-assisted tunneling.