Step-by-step design of a single phase 3.3 kV/200 a resistive type superconducting fault current limiter (R-SFCL) and cryostat

In our first attempt to design a single phase R-SFCL in India, we have chosen the typical rating of a medium voltage level (3.3 kVrms, 200 Arms, 1Φ) R-SFCL. The step-by-step design procedure for the R-SFCL involves conductor selection, time dependent electro-thermal simulations and recovery time optimization after fault removal. In the numerical analysis, effective fault limitation for a fault current of 5 kA for the medium voltage level R-SFCL are simulated. Maximum normal state resistance and maximum temperature rise in the SFCL coil during current limitation are estimated using one-dimensional energy balance equation. Further, a cryogenic system is conceptually designed for aforesaid MV level R-SFCL by considering inner and outer vessel materials, wall-thickness and thermal insulation which can be used for R-SFCL system. Finally, the total thermal load is calculated for the designed R-SFCL cryostat to select a suitable cryo-refrigerator for LN2 re-condensation.