کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
10411920 | 894841 | 2005 | 6 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
NVM based on FinFET device structures
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موضوعات مرتبط
مهندسی و علوم پایه
سایر رشته های مهندسی
مهندسی برق و الکترونیک
پیش نمایش صفحه اول مقاله

چکیده انگلیسی
High density data flash memories are essentially used in mobile applications. Flash devices have a small form factor, high storage density and low power consumption. For logic applications FinFET type devices are known to have good scalability down to 10Â nm gate length. This device architecture combined with a trapping layer enables memory cells with feature sizes well below 50Â nm. To show the scaling potential of SONOS FinFET memories, devices are processed on SOI wafers with fin widths varying from 8Â nm to 30Â nm and gate lengths scaled down to 20Â nm. We discuss three different storage modes of FinFET trapping layer NVM devices: (a) single bit SONOS cell, (b) multilevel SONOS cell and (c) NROM dual bit device. For (a) and (b) program and erase is done with Fowler-Nordheim tunneling and for (c) channel hot electrons are used for programming and hot holes are injected for the erasing of the localized charges. SONOS FinFET memory devices show excellent functionality down to 20Â nm channel length.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Solid-State Electronics - Volume 49, Issue 11, November 2005, Pages 1799-1804
Journal: Solid-State Electronics - Volume 49, Issue 11, November 2005, Pages 1799-1804
نویسندگان
F. Hofmann, M. Specht, U. Dorda, R. Kömmling, L. Dreeskornfeld, J. Kretz, M. Städele, W. Rösner, L. Risch,