Keywords: CMOS; MOSFET; Downsizing; FinFET; High-k
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Keywords: Surface roughness; FinFET; Kinetic Monte Carlo simulation; Hydrogen thermal treatment;
Keywords: Ion-implantation; Ion beam modelling; TRIDYN; TRI3DYN; Plasma doping; PLAD; FinFET;
Keywords: Workfunction; Finfet; Bias temperature instability;
Keywords: Three dimensional; Non-Fourier; Nanoscale heat transfer; MOSFET; FinFET; Tri-Gate
Keywords: Self heating effect; Thermal conductivity; Hot carrier effect; Reliability; FinFET; Three dimensional simulations;
Keywords: Monte Carlo simulation; Semiconductor devices; Finite element method; Self-forces; Particle-mesh coupling; FinFET;
Keywords: High mobility materials; FinFET; TFET; Nanowires;
Keywords: Short channel effect (SCE); Drain-induced barrier lowering (DIBL); Self-heating effects; FinFET; Three dimensional simulations;
Keywords: FinFET; Process variations; Reliability; TDDB
Detection of failure mechanisms in 24-40â¯nm FinFETs with (spectral) photon emission techniques using InGaAs camera
Keywords: Photon emission; FinFET; Spectra; Failure analysis; Carrier temperature; Hot carrier;
Effects of high in-situ source/drain boron doping in p-FinFETs on physical and device performance characteristics
Keywords: SiGe epitaxy; Boron doping; FinFET; Device simulation; MOSFET; CMOS;
Time-zero-variability and BTI impact on advanced FinFET device and circuit reliability
Keywords: Planar; SoC; FinFET; BTI; SRAM; SNM; Vmin;
Fabrication of asymmetric independent dual-gate FinFET using sidewall spacer patterning and CMP processes
Keywords: FinFET; Asymmetric independent dual-gate; Sidewall spacer patterning; Chemical-mechanical polishing (CMP) process; Multi-functional device;
Evaluation of variability using Schmitt trigger on full adders layout
Keywords: Reliability; Variability; FinFET; ASAP; Full adder; Schmitt trigger;
Wet etching of TiN in 1-D and 2-D confined nano-spaces of FinFET transistors
Keywords: TiN etching; APM; Kinetics; FinFET; Nano-confinement; EDL overlap;
Analytical model of surface potential and threshold voltage in gate-drain overlap FinFET
Keywords: FinFET; Surface potential; Threshold voltage; Overlap;
A sub 1-volt subthreshold bandgap reference at the 14â¯nm FinFET node
Keywords: Subthreshold; FinFET; Bandgap; MOS bandgap;
Analyzing the channel dopant profile in next-generation FinFETs via atom probe tomography
Keywords: Atom probe tomography; Electron energy loss spectroscopy; FinFET; Correlative microscopy; Channel; TCAD;
An energy and area efficient 4:2 compressor based on FinFETs
Keywords: Arithmetic circuits; Compressor; FinFET; Nanoelectronics;
Comparison of work function variation between FinFET and 3D stacked nanowire FET devices for 6-T SRAM reliability
Keywords: Work function variation; Threshold voltage fluctuation; Gate-all-around; FinFET; 3D stacked NWFET; 6-T SRAM; Read static noise margin;
Characterization and modeling of dynamic variability induced by BTI in nano-scaled transistors
Keywords: BTI; Dynamic variability; Finfet; Nanowire; Defect Centric Model; Monte Carlo simulation;
Investigation of BTI characteristics and its behavior on 10Â nm SRAM with high-k/metal gate FinFET technology having multi-VT gate stack
Keywords: FinFET; Bias temperature instability (BTI); Vt variability; Ring oscillator; SRAM; Static noise margin (SNM); Write margin (WRM);
Technology scaling implications for BTI reliability
Keywords: BTI (bias temperature instability); Aging; Scaling; FinFET; Tri-gate;
Topological variation on sub-20â¯nm double-gate inversion and Junctionless-FinFET based 6T-SRAM circuits and its SEU radiation performance
Keywords: FinFET; Junctionless-FinFET; Independent double-gate; 6T-SRAM; SEU radiation; Heavy ion;
Influence of temperature and heat flux time lags on the temperature distribution in modern GAAFET structure based on Dual-Phase-Lag thermal model
Keywords: Dual-Phase-Lag model; FinFET; GAAFET; Temperature distribution; Temperature time lag; Heat flux time lag;
Thermal stress probing the channel-length modulation effect of nano n-type FinFETs
Keywords: Device model; Temperature effect; Drain current; Interface states; CLM; FinFET;
Hybrid offset compensated latch-type sense amplifier for tri-gated FinFET technology
Keywords: Sense amplifier; FinFET; Offset tolerance; SRAM;
Temperature effects on BTI and soft errors in modern logic circuits
Keywords: Bias Temperature Instability (BTI); FinFET; Logic circuit; Soft error; Supply voltage; Temperature effect;
A near-threshold 10T differential SRAM cell with high read and write margins for tri-gated FinFET technology
Keywords: FinFET; Low voltage SRAM; Process variations; Near-threshold SRAM;
Methodology of determining the applicability range of the DPL model to heat transfer in modern integrated circuits comprised of FinFETs
Keywords: Dual-Phase-Lag equation; Fourier-Kirchhoff equation; Heat transfer; FinFET; Neumann boundary condition; Modified second-type boundary condition; Harmonic conjugate diffusion DPL equation; Harmonic temperature field; 14â¯nm Samsung Low Power Early technol
A novel single-ended 9T FinFET sub-threshold SRAM cell with high operating margins and low write power for low voltage operations
Keywords: FinFET; SRAM; CMOS; Sub-threshold; Write Margin;
Impact of line edge roughness on the performance of 14-nm FinFET: Device-circuit Co-design
Keywords: FinFET; Line edge roughness; Resist-defined; Spacer-defined; SRAM; Variability;
Theoretical logic performance estimation of Silicon, Germanium and SiGe nanowire Fin-Field Effect Transistor
Keywords: Nanowire; FinFET; Drain induced barrier lowering (DIBL); Transconductance; Voltage gain;
LetterPerformance enhancement of AlGaN/GaN nanochannel omega-FinFET
Keywords: AlGaN/GaN; Nanochannel; Omega-gate; FinFET; 2DEG; Breakdown voltage; Subthreshold slope;
Three-dimensional Finite Elements Method simulation of Total Ionizing Dose in 22Â nm bulk nFinFETs
Keywords: Total Ionizing Dose; Finite Elements Method; Synopsys; Simulation; FinFET; Shallow Trench Isolation;
Simultaneous DualEELS and EDS analysis across the ohmic contact region in 3D NAND storage and FinFET electronic devices
Keywords: TEM; STEM; NAND; FINFET; EELS; EDS;
Enhanced electrical characteristics of FinFET by rapid-thermal-and-laser annealing with suitable power
Keywords: FinFET; Microwave annealing; Rapid thermal annealing; Laser annealing;
Low frequency noise assessment in n- and p-channel sub-10Â nm triple-gate FinFETs: Part II: Measurements and results
Keywords: Triple-gate; FinFET; Low frequency noise; 1/f noise; Generation recombination; Traps;
Design strategies for ultra-low power 10Â nm FinFETs
Keywords: FinFET; 3D TCAD; GIDL; Ultra-low power;
Low frequency noise assessment in n- and p-channel sub-10Â nm triple-gate FinFETs: Part I: Theory and methodology
Keywords: Triple-gate; FinFET; Low frequency noise; 1/f noise; Generation-recombination; Traps;
DC and RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration
Keywords: 3D monolithic; InGaAs; RMG; High-frequency; FinFET;
Novel tri-independent-gate FinFET for multi-current modes control
Keywords: Tri-independent-gate; FinFET; Threshold voltage; TCAD;
Aging comparative analysis of high-performance FinFET and CMOS flip-flops
Keywords: Aging effect; Bias Temperature Instability (BTI); FinFET; Flip-flop; Hot Carrier Injection (HCI);
Performance Analysis of 2N-N-2P Adiabatic Logic Circuits for Low Power Applications using FinFET
Keywords: Adiabatic logic circuits; FinFET; Energy Recovery Circuits using FinFET;
Two methods of tuning threshold voltage of bulk FinFETs with replacement high-k metal-gate stacks
Keywords: FinFET; Halo; Work function; Punch through stop pocket; Threshold voltage; High k metal gate;
Highly flexible SRAM cells based on novel tri-independent-gate FinFET
Keywords: Tri-independent-gate; FinFET; SRAM; Read stability and speed;
Line edge roughness induced threshold voltage variability in nano-scale FinFETs
Keywords: FinFET; Line edge roughness; Oxide thickness variation; Random dopant fluctuation; Threshold voltage variability; Work function variation;
Atom probe tomography analysis of SiGe fins embedded in SiO2: Facts and artefacts
Keywords: Atom probe tomography; Tip shape; FinFET; Local magnification; Trajectory overlaps;
Investigation of metal-gate work-function variability in FinFET structures and implications for SRAM cell design
Keywords: FinFET; Line edge roughness; Resist defined; Spacer defined; SRAM; Work function variation;