Scaling effects in dual-bit split-gate nitride memory devices

This paper investigates the aggressive scaling of a dual-bit split-gate memory device based on nitride storage. Devices operating with very short storage area lengths of less than 10 nm are demonstrated. Using a optimized erase scheme, the erase performance is drastically enhanced as the storage area is scaled down. It is shown that this device allows for very aggressive scaling without having the main problems associated with the two bits interference as seen in other concepts.