FPGA implementation of a UPT chaotic signal generator for image encryption

In this study, the validity and feasibility of UPT chaos for image encryption is demonstrated. This paper describes the design and implementation of a UPT chaotic signal generator for image encryption based on FPGA and Chua's system. In order to demonstrate the validity of the design, the signal generated by the chaotic signal generator is compared with Matlab simulations and used in an image encryption experiment. All of the experimental results indicate that using a UPT chaotic signal generator for image encryption is both practical and effective.