کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
432069 | 688698 | 2009 | 9 صفحه PDF | دانلود رایگان |
![عکس صفحه اول مقاله: High speed filtering using reconfigurable hardware High speed filtering using reconfigurable hardware](/preview/png/432069.png)
This research develops a real-time implementation of computationally expensive prediction filters by means of task parallelization and task segmentation methodologies in an FPGA. There is a brief description of the prediction filter, then two types of implementations have been developed: PC-based sequential implementations using MATLAB and C++; and an FPGA-based parallelized implementation using VHDL. A comparative study between both types of implementations shows that the execution times measured on the FPGA are considerably lower, making this implementation valid for applications with real-time requirements. Experimental results are shown for a visual servoing task to illustrate the good performance of the proposed algorithms and implementations.
Journal: Journal of Parallel and Distributed Computing - Volume 69, Issue 11, November 2009, Pages 896–904