micMR: An efficient MapReduce framework for CPU–MIC heterogeneous architecture

• Two-level split and SIMD friendly map is developed to utilize the VPUs on MIC.
• Heterogeneous pipelined reduce improves the efficiency of resources utilization.
• We design two types of buffer for storing <> pairs in MIC memory.
• Two optimization techniques: SIMD hash algorithm and asynchronous task transfer.
• micMR is also integrated into the cluster environment.

With the high-speed development of processors, coprocessor-based MapReduce is widely studied. In this paper, we propose micMR, an efficient MapReduce framework for CPU–MIC heterogeneous architecture. micMR mainly provides the following new features. First, the two-level split and the SIMD friendly map are designed for utilizing the Vector Process Units on MIC. Second, heterogeneous pipelined reduce is developed for improving the efficiency of resource utilization. Third, a memory management scheme is designed for accessing <> pairs in both the host and the MIC memory efficiently. In addition, optimization techniques, including load balancing, SIMD hash, and asynchronous task transfer, are designed for achieving more speedups. We have developed micMR not only in a single node with CPU and MIC but also in a CPU–MIC heterogeneous cluster. The experimental results show that micMR is up to 8.4x and 45.8x faster than Phoenix++, a high-performance MapReduce system for symmetric multiprocessing system, and up to 2.0x and 5.1x faster than Hadoop in a CPU–MIC cluster.