RF stability performance of SOI junctionless FinFET and impact of process variation

In this paper we investigate the impact of process parameter variations such as temperature (T), channel doping concentration (ND), Fin height (Hfin) and Fin width (Wfin) on Radio Frequency (RF) stability performance of 20 nm Silicon on Insulator Junctionless FinFET (SOI JLFinFET). The developed RF stability model provides relation between critical frequency (fk) and small signal parameters which can be optimized for improved stability. Results shows as temperature increases (27-200 °C) cutoff frequency (fT) and maximum oscillation frequency (fmax) reduced by 12% and 8% respectively also stability factor (K) decreases by 20% at high frequency. Increasing ND, Hfin and Wfin increases fT and fmax but degrades stability performance. The result also provides optimized design guideline for operating SOI JLFinFET under RF range.