کد مقاله | کد نشریه | سال انتشار | مقاله انگلیسی | نسخه تمام متن |
---|---|---|---|---|
5005894 | 1461377 | 2017 | 6 صفحه PDF | دانلود رایگان |
عنوان انگلیسی مقاله ISI
Comprehensive effects of strained Ge1âxSnx and device layout arrangement on a nano-scale Ge-based PMOSFET with a short channel
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کلمات کلیدی
موضوعات مرتبط
مهندسی و علوم پایه
سایر رشته های مهندسی
مهندسی برق و الکترونیک
پیش نمایش صفحه اول مقاله
![عکس صفحه اول مقاله: Comprehensive effects of strained Ge1âxSnx and device layout arrangement on a nano-scale Ge-based PMOSFET with a short channel Comprehensive effects of strained Ge1âxSnx and device layout arrangement on a nano-scale Ge-based PMOSFET with a short channel](/preview/png/5005894.png)
چکیده انگلیسی
Layout patterns, including salient gate width and dummy active diffusion region (dummy OD), significantly influence the carrier mobility gain of nano scale devices. Germanium (Ge)-based devices with Ge-tin (GeSn) alloy embedded in the source/drain (S/D) regions have been regarded a promising candidate for higher channel mobility. Second-order piezoresistance coefficients were used to estimate the carrier mobility gain within the desired Ge-based device channel. A 20Â nm Ge-based p-type metal oxide semiconductor field effect transistor with 100Â nm gate width and 100Â nm dummy OD width was selected to explore the layout effect of the short channel device. The device consisted of S/D region Ge1âxSnx alloy, compressive-stressed contact etch stop layer, and deposited shallow trench isolation with different process-induced stress magnitudes. Maximum carrier mobility gain of 93.65% was obtained when a 10Â nm narrow distance between OD and dummy OD was achieved.
ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Materials Science in Semiconductor Processing - Volume 70, 1 November 2017, Pages 145-150
Journal: Materials Science in Semiconductor Processing - Volume 70, 1 November 2017, Pages 145-150
نویسندگان
Chang-Chun Lee, Pei-Chen Huang,