Study of fin tapering effect in nanoscale symmetric dual-k spacer (SDS) hybrid FinFETs

Symmetric Dual-k Spacer (SDS) Hybrid FinFETs is a novel device, which combines three significant technologies i.e., 2-D ultra-thin-body (UTB), 3-D FinFET, and symmetric spacer engineering on a single silicon on insulator (SOI) platform. For the first time, this article systematically analyzes the impacts of non-rectangular fin shape on various performance metrics of SDS Hybrid FinFETs. Under distinctive inclination fin angles as prescribed by the process technology, the performances of the device at different fin heights are examined. This work evaluates the response of fin tapering as well as fin height on parameters like threshold voltage (Vth), subthreshold slope (SS), on current (Ion), transconductance (gm), transconductance generation factor (TGF), and total gate capacitance (Cgg) in SDS Hybrid FinFETs. Optimum structural configuration is thus proposed to fabricate the hybrid device in sub-20 nm FinFET architecture.