کد مقاله کد نشریه سال انتشار مقاله انگلیسی نسخه تمام متن
539220 1450347 2015 6 صفحه PDF دانلود رایگان
عنوان انگلیسی مقاله ISI
A novel simple sub-15 nm line-and-space patterning process flow using directed self-assembly technology
موضوعات مرتبط
مهندسی و علوم پایه مهندسی کامپیوتر سخت افزارها و معماری
پیش نمایش صفحه اول مقاله
A novel simple sub-15 nm line-and-space patterning process flow using directed self-assembly technology
چکیده انگلیسی


• We report a novel simple sub-15 nm L/S patterning process using PS-b-PMMA for DSA lithography.
• The HP 15 nm L/S DSA patterning was demonstrated on 300 mm wafer.
• 3D BCP internal defect could be minimized by an optimization of material and anneal conditions.
• The 15 nm PS line patterns were transferred into SOG/SOC stacked substrate.

In order to evaluate process performances of directed self-assembly (DSA) lithography for semiconductor device manufacturing, we developed a novel simple sub-15 nm line-and-space (L/S) patterning process using polystyrene-block-poly(methyl methacrylate) (PS-b-PMMA) lamellar block copolymer (BCP). The new process with grapho- and chemo-hybrid coordinated line epitaxy, using trimming resist and shallow etching spin-on-glass (SOG) as pinning guide, requires neither special pinning guide materials to control surface free energy on guideline patterns nor any resist strip process after guideline pattern fabrication. In this process, insolubility and thermal resistance of pinning guide are provided by shallow SOG etching deposition residue consisting of SOG-occurring Si and CF4 gas-occurring CF compound. By optimization of guide resist critical dimension (CD) and resist film thickness, the half-pitch (HP) 15 nm L/S patterns after dry development were fabricated with the maximum dose margin of approximately 15%. The HP 15 nm L/S DSA patterning after SOG full etching was demonstrated on 300 mm wafer with 85 chips. The presence of characteristic 3-dimensional (3D) BCP internal defects related to PS short defects was suggested by observation at SOG half-depth etching condition, and defects could be minimized by optimization of neutral layer (NL) material and sufficient phase-separation annealing. The 15 nm PS line patterns were transferred to SOG and spin-on-carbon (SOC) stacked substrate.

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ناشر
Database: Elsevier - ScienceDirect (ساینس دایرکت)
Journal: Microelectronic Engineering - Volume 134, 20 February 2015, Pages 27–32
نویسندگان
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