Relationship between wafer edge design and its ultimate mechanical strength

Due to its brittle nature, high stress-induced in manufacturing process, silicon wafer breakage has become a major concern for all semiconductor fabrication line. Furthermore, the production cost had increased in advanced technology day by day. Even a some-percent breakage loss drives device costs up significantly if wafers are broken near completion. Consequently, wafer breakage even near the beginning of the process is significant. In short words, silicon wafer breakage has become a major concern for all semiconductor fabrication lines, and so high stresses are easily induced in its manufacture process. The production cost is increasing even breakage loss of a few percent significantly drives device costs up, if wafers are broken near completion. Even wafer breakage near the beginning of the process is significant.In this paper, we first point out the approach for the characterization of silicon wafer failure strength employing a simple drop test, thereby providing a better understanding of the stress accumulated in wafer bulk before failure.This study also presents a brand new method using a charge coupled device (CCD) to capture the cross-section image of the wafer at the wafer edge; the data measured at the edge can be used to diagnose overall wafer strength. Analysis of the image of the wafer edge is used to characterize silicon strength and a simple drop test is conducted to elucidate wafer failure, improving our understanding of the accumulation of stress in wafer bulk before failure.A physical model would also be proposed to explain the results. This model demonstrates that the fracture rate of wafers can be reduced by controlling the uniformity of the difference between the front and rear bevel lengths during the wafer manufacturing process.