Innovative polyimide liner deposition method for high-aspect-ratio and high-density through-silicon-vias (TSVs)

• An innovative polyimide liner deposition method
• Good uniform, versatile to polymer, compatible to CMOS technology
• Simple and feasible process

In three-dimensional (3D) integration, liner deposition technique with excellent step coverage is a challenge to realize through-silicon-vias (TSVs), especially for TSVs with high-aspect-ratio and high-density. This paper proposes an innovative polyimide liner deposition method, which utilizes the vacuum-assisted polymer filling and spin-coating processes, for TSV applications. The experimental SEM images and EDX analyses show that, a high-density TSV array, with a diameter of 8 μm and depth of 60 μm (corresponding aspect-ratio as high as 7.5:1), has been successfully deposited with uniform polyimide liner with the proposed method. Besides, the impacts of polyimide viscosity on the liner deposition characteristics have been investigated and detailed in this paper to get an optimization. The proposed polymer liner deposition approach involves simple and feasible process. It is not only versatile to polymers but also it is completely compatible to CMOS technology. It puts little limit on thermal budget of subsequent process and is valid for “via-middle” and “via-last” three-dimensional integration applications.

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