Soft error study in double gated FinFET-based SRAM cells with simultaneous and independent driven gates

Common double gate-FinFET (simultaneously driven gates) and independent double gate-FinFET (independently driven gates) based 6T-SRAM cells are studied in this paper for their Single Event Upset (SEU) or soft error performance using 3D TCAD simulations. Four different topologies, one common double gate-FinFET-based topology and three independent double gate-FinFET-based topologies namely, Flex-VTH, Flex-PG, and PG-SN are studied to find out their minimum radiation dose required to flip SRAM cell. The simulation results reveal that the independent double gate FinFETs in place of access devices in 6T-SRAM does not degrade the soft error performance significantly whereas the independent gate devices inside the cell, in the inverters, degrades the performance significantly.

► Four 6T-SRAM, double gate FinFET-based, cells have been simulated and studied to determine their soft error performance: one common double gate-FinFET-based (simultaneously driven gates) and three independent double gate-FinFET-based (independently driven gates).
► The simulation results reveal that the independent double gate FinFETs in place of access devices in 6T-SRAM does not degrade the soft error performance significantly whereas the independent gate devices inside the cell, in the inverters, degrade the performance significantly.
► Independent double gate FinFET as an isolated device shows degraded radiation performance compared to common double gate FinFET due to higher bipolar amplification. This is reflected in our 6T-SRAM simulations also.