Non-classical hot-electron mechanism and its implications on the reliability and scalability of the high-κ dielectric N-MOS Flash memory cell

Because a thick gate dielectric is needed for enhanced retention performance, development of deep-submicrometer flash memory technology entails aggressive channel engineering in order to suppress short-channel effect. In this work, we directly observe, in a 0.14 μm N-MOS flash cell with an abrupt channel doping profile, a transition from classical channel hot-electron (CHE) injection at high drain bias (Vds) to non-classical hot-electron injection at low Vds under conventional CHE biasing. We have also systematically investigated the effect of Vds reduction on the scalability of the hot-electron induced oxide damage region via a simple current-voltage measurement method. Scaling of the oxide damage region, as Vds decreases, is found to be suppressed in cells exhibiting the non-classical hot-electron injection phenomenon. This observation has important implications for the scalability of the high-κ dielectric based MOSFET targeted for multi-bit memory application using separate source and drain side hot-electron injection.